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Byte Craft  C for Zilog Z8

Bytecraft Z8

The Z8C Code Development System is targeted to the Z8 family of microcontrollers.  The Z8C Code Development System includes:

  • an optimising C Cross-compiler.

  • the BCLink linker.

  • an Integrated Development Environment and editor.

  • a built-in macro cross-assembler.

 

Features in Detail

 

Other features of the Z8C Code Development System include:

  • Highly optimised generated code. Full versions generate ROMable code, demonstration versions generate listing files with assembly.

 

  • part-specific header files describe the unique features of each target device.

 

  • compiler configuration using #pragma directives.

 

  • ports are declared and protected using the #pragma port series of directives

  • the #pragma vector directive specifies the location and assigned name for interrupt sources.

  • BClink Linker links object files and libraries compiled with z8c.exe

  • object libraries can be included directly in C source files using Absolute Code Mode.

  • named address spaces support the grouping of variables at specific memory locations.

  • SPECIAL address space declares variables at special locations such as external devices or internal EPROM.

 

  • LOCAL address space allows you to use local variables.

  • extensions to the C language designed specifically for the embedded systems developer. Some extensions include bit-sized data types, binary constants, extended case statements, direct variable placement with the @ symbol, and support for processor-specific functions.

 

  • interrupt handler support in C; makes context saving and restoring easy.

  • data types include:

    bit, bits

    char, short, int, long

 

  • register-oriented types for direct access to processor registers when necessary

  • selectable 8 or 16 bit int data type.

  • packed bit fields in structs.

 

  • include single and multiple lines of inline assembly within a C program with the #asm and #endasm directives

 

  • extensive control over computer-generated initializations.

  • generates source-level information required for emulators.

  • supports the instruction extensions C94, C95, HALT, MUL, STOP, WAIT

  • supports processor specific instructions DI, EI, HALT, NOP, RCF, SCF, STOP, WAIT, WDT, WDH

  • supports direct access to IPR, IMR, IRG, FLAGS, RP, SPH, SPL registers