MPC supports the Microchip PIC 12/14/16/17 families, including 8K and flash parts. The MPC Code Development System includes:
an optimising C Cross-compiler.
the BCLink linker.
an Integrated Development Environment and editor.
a built-in macro cross-assembler.
MPC includes enhanced memory management such as LOCAL and SPECIAL memory directives. The LOCAL address space directive allows the user to maximize the use of RAM, direct the placement of local variables, re-use RAM locations and pass multiple arguments to functions. The SPECIAL memory directive adds support for variables in all types of memory, external or internal.
Other features of the MPC Code Development System include:
Highly optimised generated code. Full versions generate ROMable code, demonstration versions generate listing files with assembly.
compiler configuration using #pragma directives.
ports are declared and protected using the #pragma port series of directives
the #pragma vector directive specifies the location and assigned name for interrupt sources.
BClink Linker links object files and libraries compiled with MPC.exe
object libraries can be included directly in C source files using Absolute Code Mode.
named address spaces support the grouping of variables at specific memory locations.
SPECIAL address space declares variables at special locations such as external devices or internal EPROM.
LOCAL address space allows you to use local variables.
extensions to the C language designed specifically for the embedded systems developer. Some extensions include bit-sized data types, binary constants, extended case statements, direct variable placement with the @ symbol, and support for processor-specific functions.
selectable 8 or 16 bit int data type.
packed bit fields in structs.
include single and multiple lines of inline assembly within a C program with the #asm and #endasm directives
extensive control over computer-generated initializations.
generates source-level information required for emulators
support for transparent data bank switching
support for program memory page switching
can call a function located anywhere in memory in the 12-bit core, not just in the bottom half of the memory page
support for hardware registers, including setting conf
math libraries for all PICmicro families
delays for 16C5x and 16cxx
asynchronous serial routines for 16C73/74 and 17cxx
4 and 8 channel A/D
EEPROM access routines
optional 32-bit result of 16 X 16 multiply
use with Microchip MPLAB (MPLAB Configuration for MPC)
source-level debugging with Microchip's PICMASTER emulator system, ICE 2000 emulator, MPLAB-SIM simulator system, Advanced Transdata, Tech-Tools Mathias Clearview